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shell - How to use Bash parameter substitution in a Makefile?

I've the following Makefile where I'd like to use Bash parameter substitution syntax as below:

  @echo ${Foo}
  @echo ${Foo/Bar/OK}

However it doesn't work as expected, as the output of the second echo command is empty:

$ make

Although it works fine when invoking in shell directly:

$ Foo=Bar; echo ${Foo/Bar/OK}

How can I use the above syntax in Makefile?

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If you want the shell to expand the variable you have to use a shell variable, not a make variable. ${Foo/Bar/OK} is a make variable named literally Foo/Bar/OK.

If you want to use shell variable substitution you'll have to assign that value to a shell variable:

        Foo='$(Foo)'; echo $${Foo/Bar/OK}

Note that we use the double-dollar $$ to escape the dollar sign so that make doesn't try to expand it.

I strongly recommend you don't add @ to your rules until you're sure they work. It's the single most common mistake I see; if people would just not use @ they could see the command make is invoking, and then they would better understand how make works.

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